Chandra C Varanasi

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Chandra C Varanasi

Email: chandra_varanasi-AT-msn.com

Home page: www.micron.com

Contact Information

Micron Technology

1900 Pike Rd Ste D

Longmont CO 80501

email: cvaranasi@micron.com 

Research Interests

  • Coding Techniques
  • Coding Theory
  • Communications

Biography:

EDUCATION

Ph.D. - 1993

Electrical Engineering,University of Minnesota, Minneapolis MN 55455

Advisor: Prof. John C. Kieffer

Thesis: "On the Computational Complexity of an Optimal Code for an Input-Restricted Channel"

M.S. - 1988

Electrical Engineering, Kansas State University, Manhattan KS 66502

Advisor: Prof. Stephen A. Dyer

Thesis: "The discrete Hartley Transform"

B.Tech. - 1983

Electronics and Communications Engineering, College of Engineering - Kakinada, JNT University, Hyderabad

 

 

WORK HISTORY

1993- 1997  Seagate Technology Simi Valley CA 93065

1997 - 1999 Motorola/Texas Instruments, Tempe, AZ

1999 - 2001 Infineon Technologies Corporation, Santa Cruz, CA

2002 - 2009 Seagate Technology Longmont CO 80503

July 2009 - Present: Micron Technology

 

PROFESSIONAL EXPERIENCE AND INTERESTS:

- Coding adn Signal Processing for Data Storage devices such as Hard Disk Drive, CD/DVD. In particular, modulation codes such as Run-Length-Limited (RLL) codes and Running Digital Sum (RDS) codes.

- Iterative codes as applied to data storage applications.

- Soft-in Soft-out detection algorithms.

 

DISTINCTIONS AND HONORS

- Senior Member IEEE

 

ISSUED US PATENTS

   1. Chandra C. Varanasi, "Programming Memory Cells," US Patent 8,780,659, Issue Date 07/15/2014

   2. Chandra C. Varanasi, "Apparatuses and Methods of Operating for Memory Endurance," US Patent 8,762,630, Issue Date, 06/24/2014

   3. Chandra C. Varanasi, "Resolving Trapping Sets," US Patent 8,640,002, Issue Date 01/28/2014

   4. Chandra C. Varanasi,  "Apparatuses and Methods of Operating for Memory Endurance," US Patent 8,495,285, Issue Date 07/23/2013

   5.  Chandra C. Varanasi, Kinhing P. Tsang, "DC-free code having limited error propagation and limited complexity," US Patent 7,218,256; May 15, 2007.

   6.  Chandra C. Varanasi, Kinhing P. Tsang, "DC-free code having limited error propagation and limited complexity, "US Patent 7, 084, 789; August 1, 2006.

  7.  Chandra C. Varanasi, "Run-length-limited coding with minimal error propagation," US Patent 6, 674, 375; january 6, 2004.

  8.  LeRoy A. Volz, Chandra C. Varanasi, Dennis C. Stone, "Rate n/(n+1) code for embedded servo address encoding," US Patent 5,949,358; September 7, 1999.

  9.  Chandra C. Varanasi, "Coding data in a disk drive according to a code having desired algebraic characteristics," US APtent 5,790,571; August 4, 1998.

10.  Chandra C. Varanasi, Nersi Nazari, "Matched-spectral-nul codes fro partial response channels," US Patent 5,646,950; July 8, 1997.